The present invention generally relates to transistor devices, particularly low-voltage high-frequency transistors for use in mobile telecommunications.
More specifically, the invention relates to a simplified method for fabrication of a transistor device having an improved high-frequency performance, to the transistor device itself, and to an integrated circuit comprising such a transistor device.
Bipolar integrated circuits play a major role for modern telecommunication systems. The circuits are used mostly for analog functions, e.g. for switching currents and voltages, and for high-frequency radio functions (mixers, amplifiers, detectors, etc.).
The speed of today""s silicon bipolar junction transistors (BJT) with about 50 GHz fT (maximum transition frequency) is reaching its physical limitations because of the trade-off between the thickness and the resistivity of the base layer. By adding some germanium into the base of a conventional BJT, the high-frequency characteristics can be substantially improved. Such a device is a SiGe (silicon germanium) HBT (heterojunction bipolar transistor) structure. The layer structure is usually grown with MBE (Molecular Beam Epitaxy) or CVD (Chemical Vapor Deposition), but it is also possible to implant Ge into the Si to achieve a similar effect but with less control of the doping profile.
During the last years, SiGe HBT""s have shown record high-frequency performance with respect to fT and fmax (maximum oscillation frequency). For high-frequency applications, e.g. wireless communication, the SiGe HBT can be used to boost performance of existing double-polysilicon HF-IC""s and BiCMOS technologies. There is, however, still an interest in improving the device""s frequency characteristics, especially for devices where high current needs to be amplified at high frequencies.
The launcher concept for improving the transistor performance has been known for some time and were described more in detail in the publication xe2x80x9cOptimization Guidelines for Epitaxial Collectors of Advanced BJT""s with Improved Breakdown Voltages and Speedxe2x80x9d, P. Palestri, C. Fiegna, L. Selmi, G. A. M. Hurkx, J. W. Slotboom and E. Sangiorgi, International Electron Devices Meeting Tech. Dig., 1998, p. 741, and in xe2x80x9cA Better Insight into the Performance of Silicon BJT""s Featuring Highly Nonuniform Collector Doping Profilesxe2x80x9d, P. Palestri, C. Fiegna, L. Slemi, M. S. Peter, G. A. M. Hurkx, J. W. Slotboom, E. Sangiorgi, IEEE Transactions on Electron Devices, Vol. 47, No. 5, p. 1044, May 2000. The basic idea is to create a high field layer between the base and collector so thin that no scattering will take place and with such a high field that the carrier velocities are substantially increased. The thickness should be comparable to the mean free path between scattering and the doping levels substantially higher than the rest of the collector. Typical values for the thickness are 10-100 nm and for the doping levels 1xc3x971017xe2x88x921xc3x971020 cmxe2x88x923. If the proper values can be used, the breakdown voltage is almost unchanged and the device speed is increased.
Experimental confirmation of the launcher layer function was shown in a publication xe2x80x9cEnhanced SiGe Heterojunction Bipolar Transistors with 160 GHz Fmaxxe2x80x9d, A. Schtippen, U. Erben, A. Gruhle, H. Kibbel, H. Schumacher, U. Kxc3x6nig, International Electron Devices Meeting Tech. Dig. 1995, p. 743, where the performance of double-mesa type SiGe transistors were improved substantially and a record fmax of 160 GHz was achieved.
The device structure used to show improved device performance with a double-mesa type SiGe transistor was grown with molecular beam epitaxy (MBE). Such a structure is not particularly suited for mass production or fabrication of large integrated circuits.
Such double-mesa type SiGe transistor comprising a collector launcher layer is also disclosed in the German patent application No. 196 17 030 A1.
A simplified fabrication method that can be applied for silicon/silicon germanium RF-IC bipolar transistors with minimum changes to the existing process flow is needed.
It is thus an object of the present invention to provide a method in the fabrication of a transistor device, particularly a transistor device for radio frequency applications, for forming a collector launcher layer in a simpler and more flexible way.
It is still a further object of the invention to provide such a method having increased integration flexibility and which is compatible with several technologies.
These objects among others are, according to one aspect of the invention, fulfilled by a method comprising the following steps:
providing a semiconductor substrate with an n-doped collector layer surrounded by isolation areas;
implanting antimony ions into the collector layer such that a thin highly n-doped layer is formed in the uppermost portion of said collector layer; and
forming a base on top of said thin highly n-doped layer.
Preferably, a mask is placed on top of said substrate, said mask comprising an opening above said n-doped collector layer, wherein the antimony ions are implanted through said mask opening.
Furthermore, it is an object of the present invention to provide a semiconductor transistor device resulting from above-mentioned fabrication method.
According to a second aspect of the present invention there is thus provided a semiconductor transistor device comprising a thin antimony ion-implanted layer of high doping level between its collector and base.
Implanting antimony (Sb) at low-energy before depositing the base layers in an existing bipolar RF-IC process, and thus creating a collector-launcher layer under the base, substantially improves the transistor""s high-frequency performance and current handling capabilities.
By using Sb, a thin highly doped layer can be created under the base because of the low projected range of Sb during ion implantation. Since Sb also has a low diffusion coefficient, the thin layer can withstand the thermal heat cycles of a normal process flow, without degrading the sharp doping profile of the layer.
Further advantages and characteristics of the present invention will be disclosed in the following detailed description of embodiments.